发明名称 MISCOUNT PREVENTING CIRCUIT
摘要 PURPOSE:To attain the assured transfer of the initial value and then the assured readout of the initial value by supplying the pulse different from those to be counted after the initial value is set and before the first one of pulses to be counted. CONSTITUTION:A PIC counter 50 works only for a period of the gate signal given from a PPI interface. Then the desired value is set to a count register 94 via a storage register 92. When a negative pulse is supplied to a counter 96, the data on the register 94 is set to the counter 96 with the first negative pulse. Hereafter, the value of the counter 96 is subtracted one by one for each input of the negative pulse to the counter 96. As a result, the count value of the counter 96 can be read out assuredly.
申请公布号 JPS6113713(A) 申请公布日期 1986.01.22
申请号 JP19840133802 申请日期 1984.06.28
申请人 OLYMPUS KOGAKU KOGYO KK 发明人 AMANO ATSUSHI;SUGANO MASAHIDE;HOSODA SEIICHI;HATSUTORI SHINICHIROU
分类号 G06F11/00;H03K21/40;H03K23/66 主分类号 G06F11/00
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