发明名称 Parallel-shift error reconfiguration
摘要 A reconfigurable parallel group of identical functional units and a method for reconfiguring this parallel grouping of identical functional units upon the occurrence of a failure by shifting the contents of the failed unit and the contents of all units between the failed unit and a spare unit one unit toward the spare unit is disclosed. A paired system of input and output busses allows control lines to activate and deactivate the appropriate busses so that a constant input output interface is maintained despite the failure provoked shift. This reconfigurable parallel group can also be stacked together to form larger configurations.
申请公布号 US4566102(A) 申请公布日期 1986.01.21
申请号 US19830485816 申请日期 1983.04.18
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 HEFNER, JAMES L.
分类号 G06F11/20;(IPC1-7):G11C29/00 主分类号 G06F11/20
代理机构 代理人
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