| 摘要 |
PURPOSE:To execute simply the processing of abnormality in a channel by storing identifying information at the detection of an error, and executing the channel processing as abnormal end in accordance with said discrimination information. CONSTITUTION:A CPU2 uses a certain channel area in a communication control register 21 through a system bus 3 to execute prescribed data transfer processing. When an error is generated on a system bus 3 or an interface between the system 3 and the communication control register 21, a write data parity check circuit 23 transmits its detecting signal to an FIFO 24. Receiving the detecting signal, the FIFO 24 inputs a channel selecting signal outputted from an address decoder 22 as the channel information to its inside and stores the information. A microprocessor 10 reads out the channel identifying information of the channel generating the error from the FIFO 24 and analyzes the information to execute processing for information the analyzed result to a corresponding command processing task. |
