| 摘要 |
PURPOSE:To enable the increase in integration by reducing the number of longitudinal aluminum wirings per memory cell by a method wherein the ground lines of two adjacent memory cells are made in common. CONSTITUTION:The wiring running in the X-direction is a word line 1 formed out of a polycrystalline Si layer, which is the same as the conventional case. On the other hand, the wiring running in the Y-direction is two data lines of aluminum per memory cell and a ground line 2 of aluminum used in common to two adjacent memories, which, as the Y-directional wiring, the number is smaller than the conventional case by 0.5 pieces per memory cell. Therefore, the area of a piece of memory cell is reduced by a factor of 20-30%; accordingly, the realization of a high-integration memory is enabled. |
