发明名称 TWO-DIMENSIONAL IDCT CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To decrease the frequency of addition for rounding to one and to speed up M-point×N-point two-dimensional IDCT operation by adding a specific number to the DC coefficient of an input. SOLUTION: A DC coefficeint x(0, 0) of an input DCT coefficient is inputted and 2<n-2> is added. An M×N two-dimensional IDCT computing element 2 inputs the output of an adder 1 and DCT coefficients x(0, 1)×(M-1, N-1) and performs M-point×N-point two-dimensional inverse discrete cosine transformation. The computing element 2 performs calculation up to the (k)th bit of a decimal part. A shift computing element 3 shifts the operation result of the M×N two-dimensional IDCT computing element 2 calculated with the (k) bits of the decimal part by (k) bits to the right and outputs it. Consequently, a circuit which performs the M×N two-dimensional IDCT wherein M×N is the (2n)th power of 2 can have the same effect as single-time addition for rounding all arithmetic results and the two-dimensional IDCT operation can be performed fast.</p>
申请公布号 JPH09212485(A) 申请公布日期 1997.08.15
申请号 JP19960017960 申请日期 1996.02.02
申请人 NEC CORP 发明人 MURATA HIDESATO;KURODA ICHIRO
分类号 H04N19/60;G06F17/14;H04N1/41;H04N19/42;H04N19/625;(IPC1-7):G06F17/14;H04N7/30 主分类号 H04N19/60
代理机构 代理人
主权项
地址