发明名称 |
SYNDROME PROCESSING UNIT FOR MULTIBYTE ERROR CORRECTING SYSTEM |
摘要 |
<p>SYNDROME PROCESSING UNIT FOR MULTIBYTE ERROR CORRECTING SYSTEMS A syndrome processing unit for a multibyte error correcting system is disclosed in which logical circuitry for performing product operation on selected pairs of 8-bit syndrome bytes and exclusive-OR operations on selected results of the product operations are selectively combined to define usable cofactors that correspond to coefficients of an error locator polynomial corresponding to a selected codeword if the codeword contains less than the maximum number of errors for which the system has been designed.</p> |
申请公布号 |
CA1199411(A) |
申请公布日期 |
1986.01.14 |
申请号 |
CA19830438448 |
申请日期 |
1983.10.05 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
PATEL, ARVIND M. |
分类号 |
G06F11/10;G11B20/18;H03M13/00;H03M13/15;(IPC1-7):G06F11/10 |
主分类号 |
G06F11/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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