| 摘要 |
PURPOSE:To shorten one arithmetic cycle time by executing a temporary addition by only several upper bits, inputting its result to a partial quotient forecasting device, an generating a true partial quotient forecasting signal from a result obtained from the respective partial quotient forecasting devices and a carry signal. CONSTITUTION:In case an output data of an adder 51 is 00101, a code bit of this data is ''0'' and correct, therefore, if there is no carry from a carry foreseeing circuit 521, a partial quotient forecasting signal obtained by inputting an output of a usual decoding circuit of a decoder 11 to a partial quotient forecasting circuit 3, and if there is said carry, a partial quotient forecasting signal obtained by inputting an output of the decoding circuit of the time when 00100 with a code is inputted to a decoding circuit 111 provided with a modifying function, to a partial quotient forecasting circuit 31, by forecasting a fact that the data goes to 00101 are controlled so as to be selected by a selector 12, based on the carry from the circuit 521, respectively, by which a correct partial quotient forecasting signal (m) is obtained. |
