发明名称 INTER-CENTRAL PROCESSOR COMMUNICATION SYSTEM FOR DUPLEX SYSTEM
摘要 PURPOSE:To prevent the evil effects due to the runaway of a central processor at the off-line side by monitoring periodically the discontinuation of working of said central processor through a central processor at the on-line side. CONSTITUTION:A central processor 10 at the on-line side writes the transfer data on a main memory 21 at the off-line side via a bus 101. Then the start address of a central processor 11 at the off-line side is set and started via a communication signal line 12. A monitor program of the processor 11 is started periodically at the inside of an on-line program, and the report to be given from the processor 11 is waited for. The monitor program of the processor 11 checks the discontinuation of working and then has the same processing again in the next cycle if the working is continued. If the working is stopped, the memory 21 reads the data and the processor 11 reports the end of data transfer.
申请公布号 JPS6175934(A) 申请公布日期 1986.04.18
申请号 JP19840198970 申请日期 1984.09.21
申请人 NEC CORP 发明人 TANABE YOSHIICHI
分类号 G06F11/18;G06F11/20;G06F13/00;G06F15/16;G06F15/177;H04L29/14 主分类号 G06F11/18
代理机构 代理人
主权项
地址