发明名称 SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To control overflow and underflow through a proper and simple circuit by setting up a positive value as a maximum value or a negative value as zero when input signals exceed a maximum value range expressed by the bit word length of output signals. CONSTITUTION:Input signals 5-20 from an arithmetic unit are inputted to overflow/underflow switching circuits 23 or AND gate 21. If the input signals 5- 20 are positive values and less than the maximum value expressed by the bit word length of output signals 28-35, all the input signals 13-20 are turned to low levels and the output of the OR gate 21 is also turned to the low level, so that the input signals 5-12 are outputted as the output signals 28-35 as they are. When the input signals 5-20 exceed the maximum value, the output of the OR gate 21 is turned to the high level and the output signal of an exclusive OR gate 22 is outputted as the output signals 28-35. When the input signals 5-20 are negative values, all the output signals 28-35 are turned to low levels and ''0'' is outputted.
申请公布号 JPS616734(A) 申请公布日期 1986.01.13
申请号 JP19840127909 申请日期 1984.06.21
申请人 MATSUSHITA DENKI SANGYO KK 发明人 MORI TOSHIKI;YAMADA HARUYASU;HASEGAWA KENICHI;AONO KUNITOSHI
分类号 G06F7/00;G06F7/76 主分类号 G06F7/00
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