发明名称 DIGITAL PHASE MODULATING SYSTEM
摘要 PURPOSE:To obtain a modulation input signal by storing phase shift information corresponding to various combinations over consecutive 3 bits of an input data to a memory depending on a specific condition and reading selectively the information in response to the input data. CONSTITUTION:A binary serial input data given to a terminal 1 is given to a digital memory 3 together with a data delayed by a delay circuit 2 as an information selection signal. On the other hand, a count value of a ring counter 5 counting a high-speed clock inputted to a terminal 4 is given to the memory 3 as an address designation signal. When an input data is given to the terminal 1, the phase shift information corresponding to the input data combination in consecutive 3 bits constituting the information selecting signal is selected from the memory 3 and a designated digital value by an address designation signal from the counter 5 is read sequentially. Thus, a digital phase modulation wave of sintheta(t)sinomegact+sintheta(t)cosomegact is outputted from a terminal 23 of an analog adder 22 finally.
申请公布号 JPS615659(A) 申请公布日期 1986.01.11
申请号 JP19850120269 申请日期 1985.06.03
申请人 TOSHIBA KK 发明人 SUGIYAMA FUMIO;OKAI TSUKASA
分类号 H04L27/10 主分类号 H04L27/10
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