发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce the area for capacity elements and thereby to enhance integration by a method wherein two capacity elements are built into a single fine aperture in a semiconductor integrated circuit device equipped with a dynamic random access memory. CONSTITUTION:A switching MISFET is constituted of an insulating film 4, conductive layer 5 to be a gate electrode, n<+> type semiconductor region 6 to be source/drain regions, semiconductor substrate 1 wherein a channel is formed with the region 6. Two data storing capacity elements to constitute a pair of memory cells are mostly accommodated in a fine U-shaped regions, stacked up one upon the other. The first data storing capacity element, whose function is to store charges to be developed into data to be written by the switching MISFET, is connected to a conductive layer 9 and constituted of a conductive layer 7, insulating film 11, conductive layer 12. The second data storing capacity element for the switching MISFET is connected to a conductive layer 14 and constituted of the conductive layer 7, insulating film 13, and conductive layer 12.
申请公布号 JPS615572(A) 申请公布日期 1986.01.11
申请号 JP19840125174 申请日期 1984.06.20
申请人 HITACHI SEISAKUSHO KK 发明人 KOYANAGI MITSUMASA
分类号 G11C11/401;H01L21/822;H01L21/8242;H01L27/04;H01L27/10;H01L27/108 主分类号 G11C11/401
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