发明名称 OUTPUT CIRCUIT PART OF READ ONLY MEMORY
摘要 <p>PURPOSE:To set output data in the desired bit state in a short time and to shorten the wafer test time by detecting contents of the control signal of a control terminal by means of a circuit part of an ROM, turning a switching circuit part on or off and providing a control circuit for outputted read data selectively from a buffer circuit. CONSTITUTION:Since control signals A and B are different in a wafer test mode, the output signal C of an exclusive NOR circuit 6 goes to zero level, and a switch circuit 3 is turned off. Then an output buffer circuit 1 is separated from a memory circuit. On the other hand, the signal D of an exclusive OR circuit 7 goes to ''1'' level, while transistors TrsT11, T12, T7 and T8 and turned on. Control signals are fed to an FF circuit 2 through buffer circuits 8 and 9, and the circuit 1 outputs ''1'' or ''0''. Since logic levels of the control signals A and B are equal in a memory action mode, the output signal of the circuit 7 goes to zero, and the circuit 1 is separated from control terminals 4 and 5. Meanwhile, the output signal C of the circuit 6 goes to ''1'', and the circuit 3 is turned on. Then, in correspondence to the read data from the memory circuit, the circuit 1 outputs ''1'' or ''0''.</p>
申请公布号 JPS613398(A) 申请公布日期 1986.01.09
申请号 JP19840123114 申请日期 1984.06.15
申请人 TOSHIBA KK 发明人 HIRASHITA TAKASHI
分类号 G11C11/417;G11C11/34;G11C11/413;G11C17/00;G11C29/00;G11C29/14 主分类号 G11C11/417
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