发明名称 IC DEVICE
摘要 PURPOSE:To contrive the reduction in base area and base resistance of a vertical bi-polar transistor by a method wherein elements are isolated by digging fine grooves in a semiconductor substrate. CONSTITUTION:An N<+> buried layer 101 is formed in the P<+> semiconductor substrate 100, and a P<-> epitaxial layer is formed over the whole surface. Next, grooves 120 are formed by etching and an oxide film is formed inside a groove, and the groove is filled with a poly Si 125. Then, N-layers 103 and 103' are formed in the epitaxial layer, and grooves 121 and 122 are formed in this layer 103'. After an oxide film is formed inside the groove 121 by using the groove 122 as a mask, the former groove is filled with the high-resistant poly Si 125 or an insulator. This poly Si and the inside oxide film are etched away by a required thickness, thereafter, said groove is filled with poly Si 126 of high concentration, whereas the groove 122 is filled with N<+> poly Si 127 of high concentration. After a base layer 104' is formed and etched, an oxide layer 108 is formed. An emitter layer 105' and a collector electrode layer 105'' are formed.
申请公布号 JPS613446(A) 申请公布日期 1986.01.09
申请号 JP19840123751 申请日期 1984.06.18
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 KASAI RIYOUTA
分类号 H01L27/08;H01L21/331;H01L21/76;H01L21/8249;H01L27/06;H01L29/73;H01L29/732 主分类号 H01L27/08
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