Delay circuit.

摘要

A delay circuit for delaying an analog signal (Va6) comprises a modulator (122) for converting the analog signal into a pulse width modulated signal (Vm6) carrying information about the amplitude of the analog signal. The pulse width modulated signal is delayed by a plurality of cascaded inverters (124) and subsequently demodulated in a demodulator (126) to provide a delayed analos output signal (Vda6). The delay circuit may be incorporated in an acoustic imaging system to improve image resolution.