发明名称 |
Memory access control system and method for an information processing apparatus. |
摘要 |
<p>There is a memory access control system for an information processing apparatus having a buffer memory (300) and a main memory (500). In this system, when a store or access request is generated, in the case where the data block in the address to be accessed does not exist in the buffer memory (300), the store requested data from a data register (3) is written into the buffer memory (300) before the first data in the data block read out from the main memory (500) is written into the buffer memory (300), and the data register is released to receive the next request. </p> |
申请公布号 |
EP0167089(A2) |
申请公布日期 |
1986.01.08 |
申请号 |
EP19850107839 |
申请日期 |
1985.06.25 |
申请人 |
HITACHI, LTD. |
发明人 |
TANIGUCHI, TOSHIHISA;SUMIMOTO, TSUTOMU;KUMAGAI, TAKASHI |
分类号 |
G06F12/08;(IPC1-7):G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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