| 摘要 |
A system operating in conjunction with a computer whose central processing unit is adapted to process data fed thereto by a variable data source to yield at its output port, parallel binary-coded data having an even number of bits which are supplied to a data bus. The system is coupled to the data bus and includes a series of binary rate multipliers to convert the binary-coded data to a conversion frequency which is divided to provide an output frequency in a range suitable for indicating the variable data and which is at the same time converted to an output current proportional to the variable data. The output frequency and output current are electrically isolated from the computer and its associated data source to avoid any interaction therewith.
|
