| 摘要 |
The data is gathered by a read head (101) which passes the signal to the read circuit comprising: a demodulator; a reproduction clock signal generator; a random access memory, with its write controller, to retian the demodulated signal; a clock signal to read information from the memory; a phase synchroniser for the two clock signals; a memory utilisation controller (110); and a clock frequency controller. - The signal from the read head is passed to a filter (106) and is then demodulated (108) to obtain the PCM signal, which is stored in a random access memory (111) under supervision of the memory controller (110) in association with a signal obtained by division (114) from the main clock. The memory data is used to control the VCO forming part of a phase locked loop circuit (117,118,119). The digital signal is applied to a digital-to-analog convertor (112) and then to a low pass filter (113) for application to the audio amplifier.
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