发明名称 |
Delay circuit and feedforward amplifier |
摘要 |
<p>Adelay circuit in which amplitude characteristic and delay time characteristic of the output signals do not have any ripple relative to the length of the transmission line is provided. The delay circuit includes a circuit that makes a part of signals distributed into two parts by the power divider (103) to be identical in amplitude and inverse in phase relative to the component of signals outputted from the terminal-a directly to the terminal-c of the circulator (104). By composing with the power combiner (107), both signals are offset each other at the output terminal. As a result, only the signals that are inputted from the input terminal (101) and transmitted through the circulator (104) and the open-ended transmission line (105) are outputted to the output terminal (102). <IMAGE></p> |
申请公布号 |
EP1133052(A2) |
申请公布日期 |
2001.09.12 |
申请号 |
EP20010105597 |
申请日期 |
2001.03.06 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
MATSUYOSHI, TOSHIMITSU;MATSUURA, TORU;ISHIDA, KAORU;FUJIWARA, SEIJI |
分类号 |
H03H7/30;(IPC1-7):H03H7/30 |
主分类号 |
H03H7/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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