发明名称 METHOD OF FORMING A NUMBER OF SOLDER LAYERS ON A SEMICONDUCTOR WAFER
摘要 <p>A method of forming a number of discrete solder layers on a semiconductor wafer of a large area. A number of regions which are easy to be wetted with solder are formed on one of the major surfaces of the wafer. A solder foil is positioned on the one major surface and a plate-like jig including a plate and projections formed on one surface thereof is disposed on the solder foil with the projections facing the latter. By heating the stacked assembly at a sufficiently high temperature for the solder foil to be molten, a number of the discrete solder layers having a uniform thickness are formed on the semiconductor wafer.</p>
申请公布号 EP0085974(A3) 申请公布日期 1985.12.27
申请号 EP19830101135 申请日期 1983.02.07
申请人 HITACHI, LTD. 发明人 KUSHIMA, TADAO;GOODA, MASAHIRO;SOGA, TASAO;YAMAMOTO, TOSHITAKA
分类号 H01L21/60;H01L23/485;(IPC1-7):H01L21/60 主分类号 H01L21/60
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