DELAY CIRCUIT AND WAFER TEST CIRCUIT COMPRISING IT

摘要

PROBLEM TO BE SOLVED: To provide a delay circuit in which the need for various kinds of exposure mask is eliminate and the time being elapsed before delivery can be shortened by making possible to stock wafers upon completion of wafer test, and a wafer test circuit in which test time can be shortened. SOLUTION: After a wafer test is performed by measuring the delay time (0.25S) at (N-4) stage, fuses are blown out selectively by laser trimming and a delay time is set at a desired value among 0.25S, 0.5S, 1.0S, 2.0S and 4.0S. Between fuses connected with respective stages, a current limit resistor having a high resistance (e.g. 300 kΩ) is inserted in order to prevent a current from passing.