发明名称 REGISTER FILE
摘要 PURPOSE:To detect a bit error of a storage means in a normal use state by comparing a readout address or its complement with the select signal of a storage means, or the select signal of the storage means or its complement with the readout address. CONSTITUTION:Readout data (f) is read out of the data dedicated bits of a memory part 1 according to a readout address decoded signal (e) outputted from a readout address decoding latch part 3 corresponding to the readout address (d). At the same time, an address signal (i) is read out of the address dedicated bits. The parity of the readout data (f) is checked by a readout data parity check part 9. A comparing check part 7 compares the readout address (d) with the address signal (i) when the number of ''1''s of the readout data (d) is even or compares the complement (d) of the readout address with the analog signal (i) when odd, and a trouble detection signal (k) is generated when they do not coincide with each other.
申请公布号 JPS60258662(A) 申请公布日期 1985.12.20
申请号 JP19840114321 申请日期 1984.06.04
申请人 NIPPON DENKI KK 发明人 TOMONOU YUZURU
分类号 G06F12/16;G06F11/10 主分类号 G06F12/16
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