| 摘要 |
PURPOSE:To decrease the through-current at simultaneous conduction of plural FETs by connecting a drain of the 1st N-channel field effect transistor (hereinafter called FET) to a gate of the 2nd N-channel FET and connecting a drain of the 1st P-channel FET to the gate of the 2nd N-channel FET. CONSTITUTION:Sources of FETQ5, Q6 are connected and used as an input terminal 1. A drain of the FETQ5 is connected to a gain of an FETQ7 and a drain of the FETQ6 is connected to a gate of an FETQ8 respectively. Drains of the FETs Q7, Q8 are connected and used as an output terminal 2. Control signals a, a' are inputted to the FETs Q5, Q6 and an input signal (b) is inputted from the terminal 1. Through the constitution above, when both the FETs Q7, Q8 are conducted, the through-current (i) flowing to the both is decreased. |
