| 摘要 |
PURPOSE:To produce a device enabling positive reading at high speed by forming a memory cell by P channel and N channel MNOS transistors and connecting each bit lines to the memory cell through a transistor for transfer. CONSTITUTION:Gates G in N channel MOS transistors 12, 13 each connected in series with N channel and P channel MNOS transistors 10, 11 are connected to a word line 5, and drains D are connected severally to bit lines 14, 15. When the threshold of the transistor 10 shifts to an enhancement type from a depletion type, the threshold of the transistor 11 simultaneously shifts in the opposite direction. The same applies to a reverse case. Accordingly, sufficient potential difference can be generated in the bit lines 14, 15 even on insufficient writing and reading in which each of the transistors 10, 11 does not transfer completely between the enhancement type and the depletion type, thus enabling positive reading at high speed. |
