| 摘要 |
PURPOSE:To minimize short channel effect by a method wherein an active region is provided at the topmost level of a sufficiently thin, highly pure GaAs substrate and source/drain layers are caused to extend deep into a semi-insulating GaAs layer. CONSTITUTION:By means of the organometal chemical vapor phase growing method, a semi-insulating GaAs thin layer 2 is formed containing V. In succession, an undoped, high-purity GaAs layer 3 is grown, with its thickness not more than 5,000Angstrom . V entraps carriers and the thin layer 2 presents a high resistance not lower than 10<8>OMEGAcm. Next, the high-purity GaAs layer 3 is selectively doped with Si ions and then annealed for the creation of an active region 4. A gate electrode 5 is built, whereafter ion implantation is so accomplished that the V- doped GaAs layer 2 may not be affected. Ohmic electrodes 8, 9 are built on a souce 6, drain 7. In this design, the current between the source 6 and the drain 7 runs mostly through the active region 4, greatly reducing the short channel effect. Further, wth the active region 4 being present in the high-purity GaAs layer 3, the donors are affected by the V in the semi-insulating GaAs thin layer 2 in respect of activation, which results in an FET excellent in uniformity and reproducibility. |
