发明名称 Successive approximation adc with variable frequency clock.
摘要 A successive approximation analog-to-digital converter is used in a synchronization system for matching the audio portion of an audio-visual signal with the video portion which is subject to inherent delays for signal processing. The ADC includes a successive approximation register clocked by a variable frequency clock, the frequency generally increasing as the register moves from most to least significant digit of the output digital word to maximize the speed of the conversion process.
申请公布号 EP0164747(A2) 申请公布日期 1985.12.18
申请号 EP19850107269 申请日期 1985.06.12
申请人 TEKTRONIX, INC. 发明人 DAVIDSON, SCOTT A.
分类号 H03M1/38;H03M1/00 主分类号 H03M1/38
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