| 摘要 |
PURPOSE:To decrease the time required for write by synchronizing the revolution of each bubble memory device. CONSTITUTION:Clock signals 310, 410 are supplied respectively to bubble memories 3, 4 by a bubble memory device 2, and the rotation of the magnetic loop in the memories 3, 4 is rotated in synchronizing with each other at the same phase. First a write page address is set to a register 222. A DMA control circuit 233 fetches a write data from a computer 1 to a memory 210. When a data for one page's share is stored in the memory 210, a control circuit 220 compares the content of the register 222 with the content of a counter 226 counting a page address of the memories 3, 4, and when the contents are coincident, write signals 220-1 and 220-4 are outputted. The signal 220-1 is a write command to the memories 3, 4. A serializer 211 reads sequentially a data from the memory 210 and outputs the result to the memories 3, 4. Thus, the data is written to the memories 3, 4 at the same time. |
