Method of fabricating semiconductor device with MIM capacitor

摘要

Methods of fabricating a MIM capacitor and a dual damascene structure of a semiconductor device are disclosed. A disclosed method comprises forming a first conducting material as a lower interconnect on a semiconductor substrate; sequentially depositing second and third insulating layers over the first conducting layer; performing a first damascene process to form via holes and a trench within the second and the third insulating layers; filling the via holes and the trench to form a first contact plug connected to a lower interconnect and a second contact plug to contact the lower electrode of a MIM capacitor; forming the MIM capacitor over the second contact plug; sequentially depositing fourth and fifth insulating layers over the entire surface of the resulting structure; performing a second damascene process to form a via hole and a trench within the fourth and the fifth insulating layers; and filling the via hole and the trench to form a contact plug in contact with the upper electrode of the capacitor and another contact plug connected to the lower metal interconnect.