发明名称 CIRCUITO DI RISINCRONIZZAZIONE DISEGNALI IMPULSIVI, PARTICOLARMENTE PER PERIFERICHE DI MICROPROCESSORI.
摘要 A digital retiming circuit for synchronizing a pulse signal with a local clock aligns incoming pulse signals with the local clock using a fully digital technique. The incoming signal is stored in a storage circuit which is disabled until the pulse signal has gone low before rising again. The output of the storage circuit is used to trigger a flip-flop, whose output is converted into a signal aligned with the local clock by means of a cascade of inverters and transfer gates enabled by the local clock. A trigger circuit resets the flip-flop in step with the clock whenever the incoming pulse signal is low.
申请公布号 IT8523254(D0) 申请公布日期 1985.12.18
申请号 IT19850023254 申请日期 1985.12.18
申请人 SGS MICROELETTRONICA S.P.A. 发明人 VITTORIO MASINA
分类号 G06F13/42;H04L7/02;(IPC1-7):H03L/ 主分类号 G06F13/42
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