| 摘要 |
A system for optimizing the performance of a bubble memory includes a temperature sensor, the output of which is amplified and converted to a digital number by a low power A/D converter to address a memory that stores correction data for various temperatures represented by the temperature sensor output. The correction data output by the memory is converted to an analog signal that is used to control the current flowing through a bias coil of the bubble memory. The bubble memory is used as a non-volatile back-up memory for a CMOS-RAM. A relatively small capacitor bank is charged to a high voltage during normal operation of the CMOS-RAM by a voltage booster circuit. In the event of a power interruption, low power control circuitry actuates a voltage down converter circuit that produces a regulated output voltage to temporarily power the control circuitry while the CMOS-RAM is being transferred to the bubble memory. The temperature correction of the magnetic bias field makes possible optimized performance of the bubble memory with low power consumption, allowing the physical size of the capacitor bank to be minimized so that the entire hybrid memory system, including the capacitor bank, can be implemented as a plug-in replacement for a pre-existing core memory module. |
