发明名称 |
METHOD OF DESIGNING DUMMY PATTERNS FOR SEMICONDUCTOR DEVICES |
摘要 |
A method for designing a dummy pattern of a semiconductor device is provided to obtain a third layout having good flatness characteristics by adding dot dummy patterns and linked line/space dummy patterns. A first layout forming process is performed to provide a first layout having main patterns(51). A second layout forming process is performed to form a second layout by adding oblique dot dummy patterns(61) to the first layout. The oblique dot dummy patterns have oblique rectangular dots or oblique circular dots. A third layout forming process is performed to form a third layout(50") by adding linked line/space dummy patterns(71,72,73,74) to the second layout. |
申请公布号 |
KR100689839(B1) |
申请公布日期 |
2007.02.26 |
申请号 |
KR20050084859 |
申请日期 |
2005.09.12 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
JEONG, SANG MOO;PARK, SUN HOO;HAN, DONG HYUN |
分类号 |
H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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