发明名称 SAMPLE HOLD CIRCUIT
摘要 PURPOSE:To obtain a sample hold circuit superior in temperature characteristic, power consumption, ringing, etc., by providing a voltage follower circuit capable of turning on and off the circuit operation with S/H pulses. CONSTITUTION:The voltage follower circuit 2a consisting of transistors (TR)Q1 and Q2 is provided between the collector of a TRQ3 to which an S/H pulse a' is inputted and the ungrounded terminal of a sample holding capacitor C. Consequently, the evil influence of ringing, etc., generated during pulse switch is eliminated completely and temperature compensation is attained by the TRs Q1 and Q2, thereby eliminating the temperature characteristic of an output voltage. Further, a voltage to be sampled and held is charged in a capacitor C as it is without being shifted in level and a current flows through neither a load resistance nor an amplifier in a hold time longer than a sampling time, reducing the power consumption.
申请公布号 JPS60254497(A) 申请公布日期 1985.12.16
申请号 JP19840112495 申请日期 1984.05.30
申请人 MITSUBISHI DENKI KK 发明人 KOYANO ATSUSHI
分类号 G11C27/02;(IPC1-7):G11C27/02 主分类号 G11C27/02
代理机构 代理人
主权项
地址