| 摘要 |
PURPOSE:To always detect a speed by the prescribed resolution by providing a frequency divider for dividing a high frequency pulse to supply to counting means, and means for stopping counting when the counted value output arrives at the lower limit value of the speed. CONSTITUTION:A high frequency pulse CP (period T1) is divided by a frequency divider 15 (at frequency dividing ratio:T), and a counter 12 counts the pulse by the pulse EP of an encoder. A latch circuit 13 latches the counted output of the counter 12 by a timing signal EN in response to the pulse signal EP and outputs a speed data. When rotating speed set value is multiplied by (n), the frequency dividing ratio N of the divider 15 is altered to N/n. On the other hand, a comparator 16 stops supplying high frequency pulse to the counter 12 when the counted output becomes larger than the speed lower limit set value. |
