| 摘要 |
<p>PURPOSE:To decrease the number of addresses and to simplify an external circuit for address assignment by generating diagonal addresses by using an adder or subtractor. CONSTITUTION:Four outputs of a column decoder 2 are connected to column addresses x1-x4 of a Josephson storage elment 1 and four outputs of a row decoder 3 are connected to row addresses y1-y4. An external column address select signal is inputted to the column decoder 2 and an external row address is inputted to the row decoder 3. Respective outputs of a diagonal decoder 4 are connected to diagonal addresses d1-d4 of the Josephson storage element 1, and the diagonal decoder 4 selects one necessary diagonal address amount diagonal addresses d1-d4 according to a diagonal address select signal inputted from a full-adder 5. The full-adder 5 inputs the column address select signal and row address select signal and calculates the sum of both input signals to obtain the diagonal address select signal, which is outputted to the diagonal decoder 4.</p> |
