发明名称 DRIVE PULSE GENERATING CIRCUIT
摘要 PURPOSE:To obtain an optical output waveform which is free from jitters by controlling the rise time of a drive pulse in response to the pulse generated precedently by a bit when a laser diode drive pulse is produced CONSTITUTION:As shown in G and H, a clock CLK-2 is produced based on a clock CLK so that the phase of the CLK-2 is delayed compared with a clock CLK-1 by an amount equivalent to the jitter produced by the data preceding by a step with 1 and 0. Then the CLK-2 is supplied to an AND circuit 3, and an OR is obtained between clocks CLK-1 and CLK-2 through an OR circuit 4. The CLK-2 is supplied to an AND circuit 5 in the form of a pulse having a rise earlier by a delayed amount. Thus on optical output waveform has no jitter although the pulse preceding by a bit is equal to 1 or 0. Furthermore a bias current supplied to a laser diode driving circuit can be reduced less than a threshold value current. Thus it is possible to obtain an optical output waveform which is stable even to a temperature change together with the facilitated control of the bias current.
申请公布号 JPS60253313(A) 申请公布日期 1985.12.14
申请号 JP19840109938 申请日期 1984.05.30
申请人 FUJITSU KK 发明人 WADA TETSUO;MORI MASAKAZU;OONISHI MASARU;KUWANA ISAMU
分类号 H03K17/78;H03K5/00 主分类号 H03K17/78
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