发明名称 STATE SUPERVISORY CONTROLLING SYSTEM
摘要 PURPOSE:To set combination of supervised signals and designation of output controlling signals freely and better supervisory function by storing designation of controlling signals for supervision. CONSTITUTION:A supervised signal AC is supplied to the address register 11 for reading of a storing device 10 and reads out a controlling signal for supervision stored in the storing device 10. A history memory 15 stores the state of required signals inputted from a signal line 16 every cycle and holds the state of the latest several cycles at all times. A register 21 can be set from outside, and compared with the value of a counting circuit 20 in a comparator circuit 22, and a coincidence signal 23 is outputted. A gate (clock control) 24 is controlled by the coincidence signal 23, and clock signals are controlled. Thus, operation of necessary circuit can be stopped when events that gives controlling output O1 (combination of state of signals A-C) occurred number of times designated by set value of the register 21.
申请公布号 JPS60252963(A) 申请公布日期 1985.12.13
申请号 JP19840109916 申请日期 1984.05.30
申请人 FUJITSU KK 发明人 SAKAMOTO KAZUSHI
分类号 G06F11/30 主分类号 G06F11/30
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