发明名称 SELECTIVE MULTI-BRANCH CIRCUIT
摘要 PURPOSE:To execute multi-branching corresponding to data to be processed by respective programs and to attain soft processing by setting up a specific value in an address register and a data register in each program to be executed. CONSTITUTION:The address of a memory 2 storing a multi-branched address necessary for a multi-branch instruction to be executed by the program concerned is set up in an address register 1 by using a specific register setting instruction in each program. Then, data with a tag for selecting one of a series of multi-branched addresses read out from the memory 2 are set up in a data register 4 by using the same register setting instruction. When the multi-branching instruction is executed after the setting of the data, a series of multi-branched addresses read out on the basis of the address set up in the address register 1 are selected by a multiplexer 3' in accordance with the contents of the tag part in the data register 4 and sent to an adder 5. Consequently, multi-branching specified by the address register 1 and the data register 4 can be executed.
申请公布号 JPS60251439(A) 申请公布日期 1985.12.12
申请号 JP19840107740 申请日期 1984.05.28
申请人 FUJITSU KK 发明人 NIWA MASASHI
分类号 G06F9/32;G06F9/44;G06F9/45 主分类号 G06F9/32
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