| 摘要 |
PURPOSE:To simplify control and to reduce the load of software by using a clock signal of a peripheral appratus as a control clock input for a DMA control device to generate a DMA control signal to the DMA control device. CONSTITUTION:A clock signal MDC from a magnetic disc 14 is supplied to a clock selecting circuit 24 through a frequency divider 22. The frequency divider 22 outputs a frequency dividing signal BC corresponding to divided frequency set up in a frequency dividing register 23. A bus right control signal BS outputted from the DMA control circuit 19 is supplied to the circuit 24 as a selection control signal and a system clock SC or the signal BC is selected by the circuit 24 in accordance with the active/passive status. Consequently, a peripheral apparatus control device 18 is controlled by the clock SC under the status having no right for driving a system bus, and under the status having the right, forms a DMA control signal on the basis of the signal MDC or BC from the disc 14 to execute DMA control. |
