发明名称 ARRAY CIRCUIT IN INTEGRATED CIRCUIT CHIP
摘要 <p>PURPOSE:To reduce the occupying area while maintaining simple wirings and shortage by removing the shape of a circuit unit from a square but approaching as a whole to the square to align the row (column) of the circuit units at every other one at right and left side (at upper and lower sides) in two rows (columns). CONSTITUTION:Circuit units 1 are formed in a longitudinally long length, and arranged in two rows sorted at A11-A41 at left side from below, at B11-B41 at right side, at A12-A42 at left side, at B12-B42 at right side. According to this configuration, the shape of the unit 1 is formed in a longitudinally long length, but approached to square by combination array of rows A and B. In this array, wirings of data transfer connecting wirings 2 are complexed to be thought to increase the occupying area. However, a multilayer wiring structure is employed through data transfer connecting wirings 2 and common signal wirings 3 on the circuit units, and when the wiring layers are suitably used, if the common signal wirings are many, considerable occupying area can be reduced to provide simple wirings and shortage maintained in the same manner as the conventional array.</p>
申请公布号 JPS60250661(A) 申请公布日期 1985.12.11
申请号 JP19840104775 申请日期 1984.05.25
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 KONDOU TOSHIO;HAMAGUCHI SHIGETAKE;TSUCHIYA TOSHIO;NAKAJIMA TAKATOSHI
分类号 H01L21/822;H01L21/82;H01L23/528;H01L27/04;H01L27/118 主分类号 H01L21/822
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