| 摘要 |
PURPOSE:To reduce a parasitic resistance produced in a gap between source or drain electrode and a gate electrode in a hetero junction FET by forming a buried junction gate electrode. CONSTITUTION:Be ions 42 are implanted selectively on a part connected with a gate electrode in future of a semi-insulating GaAs substrate 30, and heat-treated to activate Si atoms 38. Then, an undoped GaAs layer 31 is grown, and the Si- doped N type AlGaAs layer 32 is grown. Accordingly, electron affinity is smaller at the layer 32 as compared with the layer 31. Then, after an SiO2 film 39 is formed on a gate region 28, source and drain metals 36, 36 are formed. Subsequently, a gate electrode 40 for the region 28 is formed. Thus, the parasitic resistance between the source and the drain becomes only with contacting resistance to largely decrease it. |
