| 摘要 |
PURPOSE:To prevent a trouble diagnosing device from being overloaded when a 1-bit error occurs frequently by preventing the diagnosing device from being interrupted when a 1-bit error of read data occurs in the same address to the same bit. CONSTITUTION:A read instruction from an arithmetic processor is decoded by a control circuit 11, data is read out of a memory element array 8 specified with an address signal 10, and a 1-bit error correcting circuit 17 perform 1-bit detection and correction. A register circuit 15 is cleared in the beginning, and when a hold address signal 20 and a hold syndrome signal 21 that the register circuit 15 outputted by the register circuit 15 are '0', so a comparing circuit 22 outputs a dissidence signal to send out a 1-bit error interruption signal 23 to the diagnosing device. Then, an address signal 10 and a syndrome signal 19 coincide with the hold address signal 20 and the hold syndrome signal 21 as 1-bit errors increase, so the 1-bit error interruption signal 23 is not outputted. |
