| 摘要 |
PURPOSE:To obtain plural binary codes generated at optional timing with simple constitution without increasing the numbers of component parts of a circuit, by adding the output signal read out of a prescribed address of a memory with which the writing/reading is possible at all times with the prescribed 1st binary code and deciding whether or not the added signal is coincident with the 2nd binary code. CONSTITUTION:A RAM2 reads out the data written in the first half of an address and writes new data in the latter half respectively. The output signal of a latch 4 is supplied to the outside as a binary code output signal and also to an input terminal at one side of an adder 5. The output signal N of the adder 5 is supplied to an input terminal DSB at one side of a data selector as well as to a constant detecting circuit 7. Then it is decided whether the signal N is coincident or not with a prescribed binary code. When the coincidence is obtained, an H level is outputted to output signal lines Oa-Od of the corresponding channel at a detected time division processing time point. |
