| 摘要 |
PURPOSE:To prevent the wrong detection of a synchronizing signal by using a synchronizing signal parttern only to detect the synchronizing signal as long as said pattern is fully correct then detecting the synchronizing signal in consideration of the position from a CRC code if an error pattern containing an error flag is included within the synchronizing signal. CONSTITUTION:The synchronizing signal supplied from an input terminal 23 is supplied to a shift register 25 by a clock supplied from an input terminal 24. The signal of the register 25 is supplied to a synchronizing signal pattern coincidence circuit 28. Then the signal of 1 is outputted through an output terminal 32 to show the synchronizing signal is detected when said signal is correct. At the same time, a CRC arithmetic circuit 21 is reset. Then the signal is supplied to the circuit 21 from a conversion circuit 20, and the signal of 1 is outputted through a CRC check terminal 22 as long as no error is detected. An error flag signal is supplied to a shift register 27 through an input terminal 26 together with the synchronizing signal, and the output of a decoder 29 is supplied to an AND gate 34. While the signal outputted from the circuit 21 is supplied to the gate 34 via a counter 33. Then a detection signal can be outputted through the terminal 32. |
