| 摘要 |
PURPOSE:To attain the refresh of a dynamic RAM with no complicated constitution by adding the hardware to a DMA (direct memory access) controller to execute a mode where RAM addresses are continuously read out. CONSTITUTION:The D-RAM1 and D-RAM2, peripheral circuits, etc. of a dynamic RAM are controlled via the CPU of a microprocessor MPU. At the same time, data are transferred via a DMA controller DMAC incorporated to the MPU and with no intervention of the MPU. A flag bit showing a refresh mode can be also be added to a refresh control register CR incorporated to the DMAC in additio to an information transfer control flag bit. The addresses of both RAM1 and RAM2 are read continuosly at and after the head one via the register CR. Thus a refresh mode is carried out. Thus it is possible to refresh the RAM with addition of the simple hardware and with no complicated constitution. |
