| 摘要 |
PURPOSE:To produce a test pattern that can give accesses to the memory cells in the desired order against a memory with which the address are replaced complicatedly, by selecting freely each bit of plural addresses through a selection circuit and forming new address data. CONSTITUTION:The bits of addresses produced from a pair of address generating circuit 104 and 105 are selected by address bit selection circuits 426, 427 respectively. These circuits 426, 427 give accesses to address conversion memory circuits 108, 109 for production of new addresss of desired patterns respectively. Then an access is given to a memory to be tested with said new address for execution of a test. Thus it is possible to produce a test pattern that can give accesses to the memory cells in the desired order against a memory with which the addresses are replaced complicatedly. |
