发明名称 LOGICAL INTEGRATED CIRCUIT
摘要 PURPOSE:To make it possible to observe the FF-state of test data within a short time by applying the test data to specific FF, by making a scan-path logically variable by using the register for holding information controlling the scan-path. CONSTITUTION:At the time of usual operation, the FF-group for constituting a register circuit 201 with variable scanning function is used as independent FFs and the whole of the circuit is operated as a synchronous type order circuit. At the time of testing, information for controlling a scan-path is set to a control register 202. Subsequently, when the circuit 201 is operated as a shift register by the control signal from a signal input terminal 103, only FF corresponding to the hit pattern set to the circuit 202 among FFs constituting the circuit 201 is operated as FF on a logical scan-path. At this time, if hit patterns corresponding to the number of FFs on the logical scan-path are applied to a serial input terminal 101, data can be accurately set to FFs on the logical scan-path.
申请公布号 JPS60243578(A) 申请公布日期 1985.12.03
申请号 JP19840099748 申请日期 1984.05.18
申请人 NIPPON DENKI KK 发明人 SHIMONO TAKESHI
分类号 G01R31/28;H03K19/00 主分类号 G01R31/28
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