发明名称 |
Serial to parallel data conversion circuit |
摘要 |
Serial to parallel conversion circuitry achieves phase synchronization and signal bit sampling of received asynchronous serial data through use of a gate enable delay line oscillator having a selected response time, and selectably enabled in the presence of the received serial data to provide a sampling clock signal for shifting the serial data into register for parallel formatting at a frequency equal to the line frequency.
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申请公布号 |
US4556850(A) |
申请公布日期 |
1985.12.03 |
申请号 |
US19820438115 |
申请日期 |
1982.11.01 |
申请人 |
UNITED TECHNOLOGIES CORPORATION |
发明人 |
MCBRIEN, GREGORY J. |
分类号 |
H03M9/00;H03K3/03;H04L5/24;H04L7/02;H04L13/10;H04L25/40;H04L25/45;(IPC1-7):H03K17/00 |
主分类号 |
H03M9/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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