发明名称 MOS TYPE MEMORY
摘要 PURPOSE:To increase the reading speed of a memory device and at the same time to integrate a precharge circuit with a sense amplifier, by using the output of the sense amplifier to precharge a bit line. CONSTITUTION:A word line 22 is set at an L level prior to a reading action, and a memory cell 21 is separated electrically from bit lines 23 and 23'. Then an H level is applied to a signal line 26 to start the precharge and therefore the potentials of a pair of bit lines 23 and 23' are precharged up to a level close to the middle potential of a sense amplifier 24, i.e., the threshold voltage VTH. Then an H level is applied to the line 22 as soon as the line 26 is set at an L level. Thus a reading mode is started. The amplifier 24 is set under a neutral state immediately after the reading mode is started since the potentials of lines 23 and 23' are approximately equal to the threshold value VTH of the amplifier 24. The potentials of lines 23 and 23' are varied by the cell 21. Then the signals according to the contents of the cell 21 are fixed on both lines 23 and 23' by the change of said potentials of lines 23 and 23'.
申请公布号 JPS6194294(A) 申请公布日期 1986.05.13
申请号 JP19840216722 申请日期 1984.10.16
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KANEKO KATSUYUKI
分类号 G11C11/34 主分类号 G11C11/34
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