| 摘要 |
<p>PURPOSE:To provide a semiconductor integrated circuit device of the master slice type equipped with a high degree of wiring freedom by a method wherein a basic element assembly is used composed of complementary MIS transistors. CONSTITUTION:Several tens to hundreds of basic cells 21 are longitudinally arranged in a region 20 for basic cells and 10-30 wirings are provided in a wiring space 22 longitudinally arranged in the region 20. A wiring space 23 is laterally formed between basic cells 21, wherein only 1-4 wirings may be accommodated. The presence of a larerally arranged wiring space 23 between basic cells 21 allows wirings to be laterally distributed. With the gate electrode terminal of a basic cell being led out, with its right half symmetrical to its left half, into a longitudinally arranaged wiring space 22, wiring may be accomplished with a great case, resulting in the enhanced freedom of wiring.</p> |
