| 摘要 |
A process for manufacturing a high voltage DMOS (Deep Diffusion Metal Oxide Semiconductor) transistor includes a first ion implantation and drive-in step to form a P-well in a N-substrate, and a second such step to form a N+ region in this well and a channel between this region and the substrate and under a polysilicon gate which is covered with a silicon nitride layer during the first step. By the presence of the latter layer pitting of the gate is prevented and no leakage paths are formed between source and drain. |
