发明名称 HIGH-SPEED DIGITAL LOOP TRANSCEIVER
摘要 A high-speed digital transceiver is provided for use in a PBX environment comprising twisted-pair wire cables interconnecting like transceivers, each transceiver being operative to exchange voice, data and control information in a packetized format over a common twisted-pair cable. Specifically, each transceiver communicates packetized pulse code modulated information in pure Alternate Mark Inverted (AMI) coding, that is, without the introduction of bipolar violation pulses to provide timing. Frame synchronization is acquired on the first pulse by the use of a digital circuit deriving synchronization from a local high-speed clock. The use of a high-speed clock-driven digital circuit for synchronization acquisition eliminates the need for a phase-locked loop synchronization scheme and its concomitant finite acquisition delay. In addition, a receiving section employs a threshold selecting circuit which switches or makes thresholds in response to an expectation of the absence any bipolar violation in the transmitted signal. The effect of intersymbol interference are further minimized by provision of digital precompensation in the transmitted signal to maximize the slew rate between consecutive pulses. The precompensation scheme is based on a knowledge of the bit pattern and the amount of energy contained in a sequence of bits.
申请公布号 AU4214685(A) 申请公布日期 1985.11.28
申请号 AU19850042146 申请日期 1985.03.28
申请人 D.A.V.I.D. SYSTEMS, INC. 发明人 CAFIERO, LUCA;MAZZOLA, MARIO;PRATI, MASSIMO
分类号 H03M5/16;H04L5/14;H04L25/49 主分类号 H03M5/16
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